Huawei lauds its progress in replacing chip design software in a move led by the U.S

Chinese technology giant Huawei has reportedly developed its own chip design tools as a way to sidestep U.S. sanctions.

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China's financial and business publication Yicai obtained an interview with Huawei's rotating chairman Eric Xu that claimed the company and other domestic firms jointly developed a tool for designing semiconductors at 14 nanometers and higher.

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These tools will be verified this year, which will enable them to be used.

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Trade Algo was unable to reach Huawei for comment immediately.

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If Xu's allegations are accurate, Huawei would have made a move to lessen its reliance on US semiconductor technology. American companies, including Synopsys and Cadence Design Systems, dominate the semiconductor design tool market.

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Washington, however, cut Huawei off from US chipmaking equipment in 2020 through penalties, which severely hampered the Chinese technology giant's smartphone sector.

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Design tools for semiconductors larger than 14 nanometers were mentioned in Xu's speech. Each transistor on a chip is a specific size, measured in nanometers. More transistors can be crammed onto a single semiconductor with decreasing transistor size. Chips can typically get more potent and effective when nanoscale size is decreased.

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Nevertheless, 14-nanometer chips lag behind the most recent smartphone technology by several generations. Apple's iPhone 14 Pro Max, for instance, employs a processor with a 5 nm size. Yet, some of the company's other products might use 14-nanometer processors.

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When asked by Trade Algo how effective Huawei's design tools are, Pranay Kotasthane, director of the Takshashila Institution's high-tech geopolitics program, said he would like to see more information.

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Kotasthane outlined how semiconductor design firms collaborate with contract chip manufacturing companies to produce a collection of files known as a Process Design Kit. The fundamental parts of a chip are "modeled" by this PDK in terms of their "physical and electrical characteristics." To assure the best yield of semiconductors, the design firm and manufacturer must go through a procedure to optimize production. According to Kotasthane, "chip designs will fail when transformed into silicon" if this process is not carried out.

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“Electronic design automation (EDA) businesses from China have not yet sufficiently proven themselves,” according to Kotasthane.